TRANSLARITY WAFER TRANSLATOR™
LOW COST, HIGH PERFORMANCE
FULL WAFER SEMICONDUCTOR TEST
A new solution is needed to reduce the cost of wafer test. TRANSLARITY has the technology to break the code and offer the lowest cost of test. Learn more.
DRAM wafer test – requires high density contacts and complex electronics on a full wafer contactor.
The Wafer TranslatorTM handles this. Learn more.
SOC/Logic wafer test – requires tight pitch Cu bump probing with high density space transformation. The Wafer Translator TM includes this. Learn more.